Field
Embodiments disclosed herein generally relate to an improved method for joint decoding user data from more than one memory location.
Description of the Related Art
The performance of non-volatile memory (NVM) is limited by the raw bit error rate of NVM cells. The write noise may introduce errors, such that the actual bit-value stored in the NVM is not what was intended. For example, an intended bit-value of 0 might be inadvertently flipped to an incorrect bit-value of 1. Correction of write errors is important to assure data integrity and to increase the lifetime of NVM cells.
Various conventional error correction schemes are available to address such errors. One common error correction scheme relies on cyclic error-correcting codes that are constructed using finite fields such as the BCH. BCH code which is an acronym comprising the initials of the inventors' names (Raj Bose, Alexis Hocquenghem, and D. K. Ray-Chaudhuri), or other similar codes, which are random error correcting codes in which each bit is assumed to have an independent error probability rate. However, use of these conventional error correction schemes to achieve high reliability in NVM devices tends to result in a reduced data rate because they are designed to deal with a high number of errors.
The performance of NVMs is limited by raw bit error rate of NVM cells. Phase change memory (PCM) is a type of NVM which can read very quickly but writes are slower by several orders of magnitude. The write noise induces errors such that the actual bit-value stored in the NVM cells may not be the same as it was intended. For example, the sector may have an intended value of ‘0’ which may have been unexpectedly flipped during the write to a value of ‘1’. Correcting write errors is essential for increasing the lifetime and in assuring the data integrity of NVMs. Conventionally, error correction codes (ECCs) are widely used to detect/correct these and other write errors in NVM. Conventional error correction codes may also have a higher read latency because of the decoding complexity involved. Further, conventional error correction codes may also result in a higher probability of data loss.
Therefore, there is a need in the art for an improved method and system for error correction in non-volatile memory cells.